| 名称 | Digital computer arithmetic datapath design using Verilog HDL |
| 索引号 | TN431.2/E20044 |
| 分类号 | TN431.2 TN431.2(数字集成电路、逻辑集成电路) TN431(双极型) TN43(半导体集成电路(固体电路)) TN4(微电子学、集成电路(IC)) TN(无线电电子学、电信技术) T(工业技术) |
| 作者 | Stine、 James E.、 1966-、 |
| 出版社 | Boston : Kluwer Academic Publishers, c2004. |
| ISBN | |
| 页数 | xi, 180 p. : ill. ; 25 cm. + 1 CD-ROM(4 3/4 in.) |
| 价格 | |
| 标签 | |
| 简介 | |
| 注解 | "CD-ROM included." 附註 Includes bibliographical references and index. 摘要 This text presents basic implementation strategies for arithmetic datapath designs and methodologies utilized in the digital system. The author implements various datapath designs for addition, subtraction, multiplication, and division. Theory is presen ted to illustrate and explain why certain designs are chosen. Each implementation is discussed in terms of design choices and how particular theory is invoked in the hardware. Along with the theory that emphasizes the design in question, Verilog modules |


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